1. Field of the Invention
This invention relates to the partitioning and packaging of the elements of a data handling and processing system and, more particularly, to a data handling and processing system using distributed data handling and processing resource elements and an interconnecting low latency network.
2. Description of the Related Art
Data handling and processing systems are called upon to form the heart of most of today's advanced technological products. Often their components may be grouped together into convenient locations where a minimum mechanical and thermal environmental stress may be presented to the components. In such cases, data handling and processing resources may be functionally and physically partitioned into modules and housed together in multiple-module racks. Modules requiring communication with one another typically rely on a chassis backplane to effect such communications over the relatively short distances of several inches supported by the chassis backplane.
The increasing demands on processing throughput placed on today's systems require these systems to run at ever increasing speeds. These increasing speeds translate into increased power consumption for such modules. The modules' collection together into a common chassis leads to higher power densities for the chassis with modules, and increasing demands on the amount of heat required to be removed from the chassis assembly by its associated thermal designs. Often times, the thermal design includes aggressive active systems to remove such heat, e.g., via the use of forced air convection cooling, conduction cooling through the modules to the chassis and on to the chassis' baseplate, and coldplate mounting surfaces which may, in turn, have be actively cooled by liquid cooling loops. The active cooling required for most modern systems can become a particularly costly environmental support feature for some applications, such as for space applications. Every pound of weight required to create such active cooling accommodations for on-board electronic processing systems can typically cost $10,000 to carry to orbit, at today's launch costs. Methods that could reduce or eliminate such active cooling requirements via, perhaps passive cooling methods, would be especially valuable for space systems. One method which could help alleviate the active cooling requirement, replacing it with a form of passive cooling, would be to divide up processing resources which are normally housed together into multiple-module chassis, packaging them separately and providing an alternative means to communicate with one another than over the usual chassis backplane. With modules individually packaged, the temperature differentials required to remove heat from a module could be reduced by reducing the length of the thermal path to an appropriate heat sink. The communication method used to interconnect modules as a substitute for the backplane of the former chassis would have to offer data transfer bandwidth, addressing flexibility, and time transfer latency comparable to that of a backplane. Further, it would be desirable to create a scalable, larger combined virtual processing capability to accommodate the total processing needs of larger systems.
Some software methods have been developed for partitioning such functions across an arbitrary network and connecting them together with a communications protocol. One such method and standard is known as the Scalable Coherent Interface, and is defined by the open system standard IEEE-1596.